Cache placement policies

Cache placement policies are programmable approaches to holding data that is to be utilized by the general processing unit (CPU) in the CPU cache.

Not to be confused with cache replacement policies.
Diagram of a generic dual-core processor with CPU-local level-1 caches and a shared, on-die level-2 cache

Performance

CPU cache plays a significant role in the overall performance of a computer system and the speed at which a general processing unit (CPU) can process data. CPU cache is very fast computer memory, usually using static random-access memory (SRAM). SRAM is volatile memory, it can only store data when supplied with electricity. The CPU cache sits between the CPU core and the random-access memory (RAM), also known as main memory. The CPU cache isolates the super fast CPU cores from the much slower RAM, which is usually dynamic random access memory (DRAM).[1]

Cache placement policies can enhance the performance of data processing by the CPU cores, because computer programs may access data in the RAM sequentially, also known as sequential execution or spatial locality behavior. Alternatively computer programs may execute a part of the code or data repeatedly for some time, also known as sequential code execution or loop structure.[2]

General purpose computing has sucessfully used CPU caches, by implementing cache placement policies that are appropiate to the computer program routines in processing data. By exploiting the properties of a computer program, cache placement policies ensure that the data processed is readily available and as close as possible to the super fast CPU core. A so called cache hit indicates that the cache placement policy was successful because the CPU core can access the data at speed. A cache miss is generated when the CPU core cant find the required data in the CPU cache and the data needs to be pulled out of the random-access memory (RAM), also known as main memeory. When the CPU core needs to read data out of the RAM, rather than the CPU cache, the access is often three or four times slower.[3]

Approaches to cache placement
Direct-Mapped Cache
Fully associative cache

There are three different policies available for placement of data the CPU cache: direct-mapped, fully associative, and set-associative. Originally this space of cache organizations was described using the term "congruence mapping".[4]

See also

References
  1. Sivarama P. Dandamudi (2006). Fundamentals of Computer Organization and Design. Springer New York. p. 731. ISBN 9780387215662.
  2. Sivarama P. Dandamudi (2006). Fundamentals of Computer Organization and Design. Springer New York. p. 731. ISBN 9780387215662.
  3. André M. van Tilborg; Gary M. Koob, eds. (2012). Foundations of Real-Time Computing: Scheduling and Resource Management. Springer US. p. 252. ISBN 9781461539568.
  4. Mattson, R.L.; Gecsei, J.; Slutz, D. R.; Traiger, I (1970). "Evaluation Techniques for Storage Hierarchies". IBM Systems Journal. 9 (2): 78–117. doi:10.1147/sj.92.0078.
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