Input/output base address
In the x86 architecture, an input/output base address is the first I/O address of a range of consecutive read/write addresses that a device uses on the x86's I/O bus. This base address is sometimes called an I/O port.
Common I/O base address device assignments in IBM PC compatible computers
This table represents the common I/O address ranges for device assignments in IBM PC compatible computers. The base address is the first in each range. Different types of devices can vary in the number of I/O ports they need for communication with the CPU, therefore the extent of the address range varies. Also, address decoders often do not decode all address bits, causing the necessary I/O address range window to be larger than necessary or mirrored to other addresses as well. Each row of the table represents a device or chip within the computer system. For example, the address of the status port in a parallel printer adapter is at 0x0001. Depending on the adapter's configuration, this may be mapped in at different locations within the PC's I/O address range. Assuming, the adapter would present a third parallel port (with base address 0x0278), this would result in the status port mapped in at 0x0279 in the CPU'S I/O address space.
When there are two or more identical devices in a computer system, each device would be mapped to a different base address (e.g. LPT2 and LPT3 for printers).
| I/O address range | Device |
|---|---|
| 00 – 1F | First DMA controller 8237 A-5 |
| 20 – 3F | First Programmable interrupt controller, 8259A, |
| 40 – 5F | Programmable interval timer (System Timer), 8254 |
| 60 – 6F | Keyboard, 8042 |
| 70 – 7F | Real-time clock, NMI mask |
| 80 – 9F | DMA Page Register, 74LS612 |
| 87 | DMA Channel 0 |
| 83 | DMA Channel 1 |
| 81 | DMA Channel 2 |
| 82 | DMA Channel 3 |
| 8B | DMA Channel 5 |
| 89 | DMA Channel 6 |
| 8A | DMA Channel 7 |
| 8F | Refresh |
| A0 – BF | Second Programmable interrupt controller, 8259A, Slave |
| C0 – DF | Second DMA controller 8237 A-5 |
| F0 | Clear 80287 Busy |
| F1 | Reset 80287 |
| F8 – FF | Math coprocessor, 80287 |
| F0 – F5 | PCjr Disk Controller |
| F8 – FF | Reserved for future microprocessor extensions |
| 100 – 10F | POS Programmable Option Select (PS/2) |
| 110 – 1EF | System I/O channel |
| 140 – 15F | Secondary SCSI host adapter |
| 170 – 177 | Secondary Parallel ATA Disk Controller |
| 1F0 – 1F7 | Primary Parallel ATA Hard Disk Controller |
| 200 – 20F | Game port |
| 210 – 217 | Expansion Unit |
| 220 – 233 | Sound Blaster and most other sound cards |
| 278 – 27F | Parallel port 3 |
| 280 – 29F | LCD on Wyse 2108 PC SMC Elite default factory setting |
| 2B0 – 2DF | Alternate Enhanced Graphics Adapter (EGA) display control |
| 2E8 – 2EF | Serial port 4 |
| 2E1 | GPIB/IEEE-488 Adapter 0 |
| 2E2 – 2E3 | Data acquisition |
| 2F8 – 2FF | Serial port 2 |
| 300 – 31F | Prototype Card |
| 300 – 31F | Novell NE1000 compatible Ethernet network interfaces |
| 300 – 31F | AMD Am7990 Ethernet network interface, IRQ=5. |
| 320 – 323 | ST-506 and compatible hard disk drive interface |
| 330 – 331 | MPU-401 MIDI processing unit on most sound cards |
| 340 – 35F | Primary SCSI host adapter |
| 370 – 377 | Secondary floppy disk drive controller |
| 378 – 37F | Parallel port 2 |
| 380 – 38C | Secondary Binary Synchronous Data Link Control (SDLC) adapter |
| 388 – 389 | AdLib Music Synthesizer Card |
| 3A0 – 3A9 | Primary Binary Synchronous Data Link Control (SDLC) adapter |
| 3B0 – 3BB | Monochrome Display Adapter (MDA) display control |
| 3BC – 3BF | Parallel port 1 on MDA card |
| 3C0 – 3CF | Enhanced Graphics Adapter (EGA) display control |
| 3D0 – 3DF | Color Graphics Adapter (CGA) |
| 3E8 – 3EF | Serial port 3 |
| 3F0 – 3F7 | Primary floppy disk drive controller. Primary IDE controller (second I/O range) (3F6–3F7h) |
| 3F8 – 3FF | Serial port 1 |
| CF8 – CFC | PCI configuration space |
Note: For many devices listed above the assignments can be changed via jumpers, DIP switches, or Plug-And-Play software.
See also
- IRQ - interrupt request
References
- HelpPC Quick Reference Utility by David Jurgens
External links
- Ralf Brown's Interrupt List – includes a list of I/O ports on IBM PC compatibles
- Base address term definition from Webopedia Archived 2009-12-08 at the Wayback Machine
- Introduction to IRQs, DMAs and Base Addresses Copyright © 1999, Eugene Blanchard, Published in Issue 38 of Linux Gazette, March 1999
- The PC Guide
- Apogee FAQ at RinkWorks
- Programming the AdLib/Sound Blaster FM Music Chips
- Perangkat Input dan Output Komputer at OS/2 Site tehdian